Design a synchronous counter for the sequence: 0,1,2,4,5,7,0,1,2,dots and consider all the states which will not be appeared as
don't care state. Provide the following:
a) The number of bits required for the counter
(b) State diagram
(c) State transition table
(d) K-Map simplifications for J-K Flip-Flops
(e) The circuit diagram